40000fec | main | ['0x60000318'] |
40001160 | sip_40001160 | ['0x60000824'] |
400011ac | boot_from_something | ['0x60000318'] |
400025e0 | rtc_get_reset_reason | ['0x60000708', '0x60000714', '0x60000718'] |
4000264c | software_reset | ['0x60000700'] |
40002668 | rtc_set_sleep_mode | ['0x60000704', '0x60000708', '0x60000718', '0x6000071c'] |
40002870 | rtc_enter_sleep | ['0x6000036c', '0x60000370', '0x60000704', '0x60000708', '0x60000710', '0x60000718', '0x6000071c', '0x60000720', '0x60000724', '0x600007a8'] |
400029ec | rtc_intr_handler | ['0x60000718', '0x60000720', '0x60000724', '0x60000728'] |
40002a40 | ets_rtc_int_register | ['0x60000720', '0x60000724'] |
40002bf8 | timer_frc2_set_alarm | ['0x60000630'] |
40002c04 | ets_timer_set_hwtimer | ['0x60000624'] |
40002cc4 | ets_timer_arm | ['0x60000624'] |
40002da8 | ets_timer_handler_isr__1 | ['0x60000624'] |
40002e68 | ets_timer_init__1 | ['0x3ff00004', '0x60000620', '0x60000628', '0x60000630'] |
40002f3c | wdt_irq_real_handler | ['0x60000910', '0x60000914', '0x60000918'] |
40002fa0 | ets_wdt_enable | ['0x60000900', '0x60000904', '0x60000908'] |
400030f0 | ets_wdt_disable | ['0x60000900', '0x60000914'] |
40003170 | ets_wdt_init | ['0x3ff00004', '0x60000900'] |
40003230 | UartConnCheck | ['0x60000820', '0x60000824'] |
40003924 | uart_baudrate_detect | ['0x60000018 + (i16)0xf00 * (i16)$a2', '0x60000028 + (i16)0xf00 * (i16)$a2', '0x6000002c + (i16)0xf00 * (i16)$a2', '0x60000030 + (i16)0xf00 * (i16)$a2'] |
400039d8 | uart_div_modify | ['0x60000014 + (i16)0xf00 * (i16)$a2', '0x60000020 + (i16)0xf00 * (i16)$a2'] |
40003a14 | Uart_Init | ['0x60000020 + (i16)0xf00 * (i16)$a12', '0x60000818', '0x60000824', '0x60000838'] |
40003b30 | uart_tx_one_char | ['0x60000000 + (i16)0xf00 * (i16)*(u8*)(UartDev + 0x40)', '0x6000001c + (i16)0xf00 * (i16)*(u8*)(UartDev + 0x40)'] |
40003b64 | uart_rx_one_char_block | ['0x60000000 + (i16)0xf00 * (i16)*(u8*)(UartDev + 0x40)', '0x6000001c + (i16)0xf00 * (i16)*(u8*)(UartDev + 0x40)'] |
40003b8c | uart_rx_one_char | ['0x60000000 + (i16)0xf00 * (i16)*(u8*)(UartDev + 0x40)', '0x6000001c + (i16)0xf00 * (i16)*(u8*)(UartDev + 0x40)'] |
40003bbc | uart_rx_intr_handler | ['0x60000000 + 0xf00 * (i16)(u8)*(u32*)(UartDev + 0x40)', '0x60000008 + (i16)(u8)*(u32*)(UartDev + 0x40) * 0xf00', '0x60000010 + (i16)(u8)*(u32*)(UartDev + 0x40) * 0xf00', '0x6000001c + 0xf00 * (i16)(u8)*(u32*)(UartDev + 0x40)'] |
40003f58 | SelectSpiFunction | ['0x6000081c', '0x60000820', '0x60000824', '0x60000828', '0x6000082c', '0x60000830', '0x60000d48'] |
40004080 | SPIEraseChip_internal | ['0x60000200'] |
400040c0 | SPIEraseSector_internal | ['0x60000200', '0x60000204'] |
40004120 | SPIEraseBlock_internal | ['0x60000200', '0x60000204'] |
40004174 | SPI_page_program | ['0x60000200', '0x60000204', '0x60000240', '0x60000240 + $a4 * 4'] |
400042ac | SPIRead_internal | ['0x60000200', '0x60000204', '0x60000240'] |
400043c8 | SPI_read_status | ['0x60000200', '0x60000210'] |
40004400 | SPI_write_status | ['0x60000200', '0x60000210'] |
4000443c | SPI_write_enable | ['0x60000200'] |
4000448c | Wait_SPI_Idle | ['0x3ff0000c'] |
400044c0 | Enable_QMode | ['0x60000208'] |
40004508 | Disable_QMode | ['0x60000208'] |
40004568 | SPIFlashModeSetup | ['0x60000200', '0x60000208', '0x6000021c', '0x60000800'] |
40004678 | Cache_Read_Enable | ['0x3ff0000c', '0x3ff00024', '0x60000208'] |
400047f0 | Cache_Read_Disable | ['0x3ff0000c', '0x60000208'] |
400048ec | SPIReadModeCnfig | ['0x60000208'] |
40004c50 | gpio_init | ['0x60000324'] |
40004cd0 | gpio_output_set | ['0x60000304', '0x60000308', '0x60000310', '0x60000314'] |
40004cf0 | gpio_input_get | ['0x60000318'] |
40004d04 | gpio_register_set | ['0x60000328 + $a12 * 4'] |
40004d5c | gpio_register_get | ['0x60000328 + $a2 * 4'] |
40004d90 | gpio_pin_intr_state_set | ['0x60000328 + *(u32*)$sp * 4'] |
40004dcc | gpio_intr_ack | ['0x60000320'] |
40004e34 | gpio_irq_handler | ['0x6000031c', '0x60000324'] |
40004e90 | gpio_pin_wakeup_enable | ['0x60000328 + *(u32*)$sp * 4'] |
40004ed4 | gpio_pin_wakeup_disable | ['0x60000328 + $a3 * 4'] |
400056ec | sip_400056ec | ['0x60000b94'] |
40005c50 | slc_init_attach | ['0x60000a00', '0x60000a04', '0x60000b00', '0x60000b10', '0x60000b28', '0x60000b5c', '0x60000bb0', '0x60000bb4'] |
40005d90 | slc_enable | ['0x60000b0c'] |
40005de4 | slc_send_to_host_chain | ['0x60000304', '0x60000308', '0x60000b0c', '0x60000b24'] |
40005e94 | slc_from_host_chain_recycle | ['0x60000b28'] |
40005f10 | slc_to_host_chain_recycle | ['0x60000b48'] |
40005f24 | slc_from_host_chain_fetch | ['0x60000b4c'] |
40005f50 | slc_intr_handler | ['0x60000304', '0x60000308', '0x60000b08', '0x60000b0c', '0x60000b10'] |
40006014 | slc_pause_from_host | ['0x60000b0c'] |
4000603c | slc_resume_from_host | ['0x60000b0c'] |
40006068 | slc_set_host_io_max_window | ['0x60000b44'] |
4000608c | slc_init_credit | ['0x60000b34'] |
400060ac | slc_add_credits | ['0x60000b34'] |
400060d0 | rom_chip_v5_disable_cca | ['0x60009b00'] |
400060ec | rom_chip_v5_enable_cca | ['0x60009b00'] |
4000610c | rom_chip_v5_sense_backoff | ['0x60009c28', '0x60009d24'] |
4000615c | rom_dc_iq_est | ['0x600005dc', '0x600005e0'] |
400061b8 | rom_en_pwdet | ['0x60000d50', '0x60000d5c'] |
40006260 | rom_get_corr_power | ['0x60000580', '0x60000584', '0x60000588', '0x6000058c', '0x600005dc', '0x600005e0', '0x600005e4'] |
400062dc | rom_get_fm_sar_dout | ['0x60000d50', '0x60000d80 + $a3 * 4'] |
40006394 | rom_get_noisefloor | ['0x60009b64'] |
40006400 | rom_iq_est_disable | ['0x6000057c'] |
40006430 | rom_iq_est_enable | ['0x6000057c'] |
40006628 | rom_rxiq_get_mis | ['0x60000580', '0x60000584', '0x60000588', '0x6000058c'] |
40006738 | rom_sar_init | ['0x60000710'] |
40006830 | rom_set_noise_floor | ['0x60009b60', '0x60009b64'] |
40006874 | rom_start_noisefloor | ['0x60009b60', '0x60009b64'] |
400068b4 | rom_start_tx_tone | ['0x600005b8', '0x600005bc', '0x600005c4'] |
4000698c | rom_stop_tx_tone | ['0x600005b8', '0x600005bc', '0x600005c4'] |
40006a98 | rom_tx_mac_disable | ['0x3ff20c94', '0x3ff20de0'] |
40006ad4 | rom_tx_mac_enable | ['0x3ff20c94', '0x3ff20de0'] |
40006f84 | rom_chip_50_set_channel | ['0x600098a0', '0x60009b14'] |
40007268 | rom_i2c_readReg | ['0x60000d00 + $a3 * 4'] |
400072d8 | rom_i2c_writeReg | ['0x60000d00 + $a3 * 4'] |
4000737c | rom_pbus_debugmode | ['0x3ff20c70', '0x60000594', '0x60009b08'] |
4000747c | rom_pbus_force_test | ['0x60000594', '0x600005a0'] |
40007648 | rom_pbus_workmode | ['0x60000594', '0x60009b08'] |
40007804 | rom_phy_reset_req | ['0x60000710'] |
40007a28 | rom_cal_tos_v50 | ['0x60000d4c', '0x60009864'] |
40008610 | rom_rfcal_txiq | ['0x6000983c', '0x60009860', '0x60009864', '0x60009a28'] |
400088b8 | rom_rfcal_txiq_cover | ['0x600005b8'] |
40008c6c | rom_set_txbb_atten | ['0x60000504 + $a13 * 4'] |
40008d34 | rom_set_txiq_cal | ['0x60009860'] |